The present invention relates to a fuse circuit for use in a trimming circuit that adjusts the electrical characteristics of, for example, a semiconductor device, and to an electronic circuit including the fuse circuit.
A semiconductor integrated circuit may include a fuse circuit for setting various operations, such as trimming and other desired operations. For example, a trimming circuit, which is arranged in an electronic circuit such as a semiconductor device, may include such a fuse circuit. To adjust the characteristics of the electronic circuit, the trimming circuit changes its resistance by switching transistors included in the trimming circuit. The fuse circuit enables the trimming circuit to perform the switching operation of the transistors. More specifically, the fuse circuit controls the switching operation of a plurality of stages of transistors included in the trimming circuit by breaking fuses corresponding to the transistors.
Japanese Laid-Open Patent Publication No. 2000-68458 describes a technique for displaying an unchangeable and unique identification number by breaking fuses. A circuit configured in accordance with this prior art technique is, for example, a fuse circuit shown in FIG. 5A. The fuse circuit shown in FIG. 5A includes a plurality of fuse lines, each including a fuse. The fuse lines are connected in parallel between a line for high-potential VCC and a line for ground GND, which functions as low potential. The fuse circuit further includes a plurality of inverters, each of which has an input terminal connected between the fuse of one fuse line and the high-potential VCC and an output terminal connected to the gate terminal of a transistor.
When the fuse of each fuse line is completely broken, the resistance of the fuse is infinite. However, when the fuse of each fuse line is incompletely broken, the resistance of the fuse is finite. For example, each fuse line may include a pull-up resistor as shown in FIG. 5A. In this case, the voltage Vfuse of each fuse line is a divided value obtained by the fuse resistance Rfuse and the pull-up resistance. Thus, the voltage Vfuse of each fuse line changes according to the ratio of the fuse resistance Rfuse and the pull-up resistance. When the fuse is incompletely broken, the fuse resistance Rfuse is finite so that the ratio of the fuse resistance Rfuse and the pull-up resistance becomes finite. This generates an intermediate voltage between the high-potential VCC and the ground GND as the voltage Vfuse of the fuse line.
FIG. 5B is a histogram of the fuse resistance Rfuse. When the fuse is not broken, the resistance of the fuse is ideally zero. However, the resistance of the fuse is actually not zero and is a small value. The fuse resistance may show values distributed as shown in the left portion of FIG. 5B. When the fuse is broken, the resistance of the fuse is ideally infinite. However, there may be cases in which the fuse is incompletely broken. Thus, the fuse resistance may show values distributed as shown in the right portion of FIG. 5B. If the complementary operation of the inverters is imperfect in this circuit, leak current may be generated in the inverters. In particular, the complementary operation of the inverters becomes imperfect and leak currents are generated in the inverters in a wide range as shown in FIG. 5D when the voltage Vfuse changes slowly in accordance with the fuse resistance.
Japanese Laid-Open Patent Publication No. 2000-200497 describes a technique relating to a fuse determination circuit of which critical resistance dependency and temperature dependency are small. The critical resistance is a boundary value used to determine whether a fuse is broken. FIG. 6A shows a circuit described in the publication that is configured in correspondence with the present invention. The fuse circuit shown in FIG. 6A has the same configuration as the fuse circuit of FIG. 5A except in that each pull-up resistor is replaced by a pull-up current source. In the circuit shown in FIG. 6A, the pull-up current source is a constant current source. Accordingly, the voltage Vfuse of each fuse line is a value proportional to the resistance of the entire fuse line.
This circuit configuration permits the voltage Vfuse to increase linearly in proportion to the resistance of each fuse line. When the product of the pull-up current and the fuse resistance Rfuse is greater than the voltage of the high-potential VCC, the voltage Vfuse of the fuse line becomes equal to the voltage of the high-potential VCC. Thus, with respect to the voltage Vfuse corresponding to the fuse resistance Rfuse, the range in which leak current is generated in the inverters is narrow as shown in FIG. 6C.
It is preferable that the resistance of each pull-up resistor be high to reduce consumption current in each fuse line of the fuse circuit shown in FIG. 5A. However, when the resistance of the pull-up resistor is high, the resistance of each broken fuse and the resistance of the corresponding pull-up resistor are close to each other. Thus, the voltage Vfuse changes more slowly, and a large leak current may be generated in an inverter depending on differences in the fuse resistances. As a result, consumption current of the inverter cannot be reduced.
The circuit shown in FIG. 6A has a narrower range in which the complementary operation of the inverters is imperfect compared to the circuit shown in FIG. 5A. However, the voltage range is still large, and leak currents may be generated in the inverters. The range in which leak currents are generated in the inverters may further be narrowed by increasing the pull-up current. However, this may increase consumption current of each fuse line. Further, the pull-up current must be accurate. Accordingly, it is difficult to reduce consumption current in each fuse line while reducing leak currents generated in the inverters.